mirror of
https://github.com/zebrajr/tensorflow.git
synced 2025-12-06 12:20:11 +01:00
use newer xnnpack related source for M1 bazel build
with newer related code, we can build benchmark_model with xnnpack, gpu, and coreml delegates. On M1 machiens, Either ``` bazel-3.7.2-arm64 tensorflow/lite/tools/benchmark:benchmark_model --config macos_arm64 --macos_cpus arm64 ``` or ``` bazel-4.0-arm64 tensorflow/lite/tools/benchmark:benchmark_model ``` works.
This commit is contained in:
Koan-Sin Tan
parent
35188307ba
commit
8060cb22de
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@ -126,11 +126,11 @@ def _tf_repositories():
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# and update the sha256 with the result.
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tf_http_archive(
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name = "XNNPACK",
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sha256 = "4fa6c19fa552dbd5d94b2fc287fc2b0788b34a93808181b33b1ef82d4ff8a9d3",
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strip_prefix = "XNNPACK-01c341b597504643081ff596d8ee755bf4c59c51",
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sha256 = "95b778a920a1a79efdb11bf68dda9b4fd16779a1a0210438582e750f9bfb6351",
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strip_prefix = "XNNPACK-fb8d1f1b2bb2e32c141564528a39748c4631b453",
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urls = [
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"https://storage.googleapis.com/mirror.tensorflow.org/github.com/google/XNNPACK/archive/01c341b597504643081ff596d8ee755bf4c59c51.zip",
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"https://github.com/google/XNNPACK/archive/01c341b597504643081ff596d8ee755bf4c59c51.zip",
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"https://storage.googleapis.com/mirror.tensorflow.org/github.com/google/XNNPACK/archive/fb8d1f1b2bb2e32c141564528a39748c4631b453.zip",
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"https://github.com/google/XNNPACK/archive/fb8d1f1b2bb2e32c141564528a39748c4631b453.zip",
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],
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)
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@ -146,11 +146,11 @@ def _tf_repositories():
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tf_http_archive(
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name = "pthreadpool",
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sha256 = "e576de3e2504018462a3ee2282c99c2d0d708f01d17cd2f71f9f1fe6d3ba8b9b",
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strip_prefix = "pthreadpool-77f9d3bcfabd1bdb910dd33b549d5290b968ef05",
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sha256 = "b96413b10dd8edaa4f6c0a60c6cf5ef55eebeef78164d5d69294c8173457f0ec",
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strip_prefix = "pthreadpool-b8374f80e42010941bda6c85b0e3f1a1bd77a1e0",
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urls = [
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"https://storage.googleapis.com/mirror.tensorflow.org/github.com/Maratyszcza/pthreadpool/archive/77f9d3bcfabd1bdb910dd33b549d5290b968ef05.zip",
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"https://github.com/Maratyszcza/pthreadpool/archive/77f9d3bcfabd1bdb910dd33b549d5290b968ef05.zip",
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"https://storage.googleapis.com/mirror.tensorflow.org/github.com/Maratyszcza/pthreadpool/archive/b8374f80e42010941bda6c85b0e3f1a1bd77a1e0.zip",
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"https://github.com/Maratyszcza/pthreadpool/archive/b8374f80e42010941bda6c85b0e3f1a1bd77a1e0.zip",
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],
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)
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130
third_party/cpuinfo/cpuinfo.patch
vendored
130
third_party/cpuinfo/cpuinfo.patch
vendored
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@ -1,130 +0,0 @@
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diff --git a/include/cpuinfo.h b/include/cpuinfo.h
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index 6c67c34..85ce174 100644
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--- a/include/cpuinfo.h
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+++ b/include/cpuinfo.h
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@@ -417,6 +417,8 @@ enum cpuinfo_uarch {
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cpuinfo_uarch_cortex_a76 = 0x00300376,
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/** ARM Cortex-A77. */
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cpuinfo_uarch_cortex_a77 = 0x00300377,
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+ /** ARM Cortex-A78. */
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+ cpuinfo_uarch_cortex_a78 = 0x00300378,
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/** ARM Neoverse N1. */
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cpuinfo_uarch_neoverse_n1 = 0x00300400,
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@@ -1434,6 +1436,7 @@ static inline bool cpuinfo_has_x86_sha(void) {
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bool armv6k;
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bool armv7;
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bool armv7mp;
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+ bool armv8;
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bool idiv;
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bool vfpv2;
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@@ -1521,6 +1524,16 @@ static inline bool cpuinfo_has_arm_v7mp(void) {
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#endif
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}
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+static inline bool cpuinfo_has_arm_v8(void) {
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+ #if CPUINFO_ARCH_ARM64
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+ return true;
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+ #elif CPUINFO_ARCH_ARM
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+ return cpuinfo_isa.armv8;
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+ #else
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+ return false;
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+ #endif
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+}
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+
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static inline bool cpuinfo_has_arm_idiv(void) {
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#if CPUINFO_ARCH_ARM64
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return true;
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@@ -1645,6 +1658,16 @@ static inline bool cpuinfo_has_arm_neon_fma(void) {
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#endif
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}
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+static inline bool cpuinfo_has_arm_neon_v8(void) {
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+ #if CPUINFO_ARCH_ARM64
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+ return true;
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+ #elif CPUINFO_ARCH_ARM
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+ return cpuinfo_isa.neon && cpuinfo_isa.armv8;
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+ #else
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+ return false;
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+ #endif
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+}
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+
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static inline bool cpuinfo_has_arm_atomics(void) {
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#if CPUINFO_ARCH_ARM64
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return cpuinfo_isa.atomics;
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diff --git a/src/arm/linux/aarch32-isa.c b/src/arm/linux/aarch32-isa.c
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index 64dd168..41f9972 100644
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--- a/src/arm/linux/aarch32-isa.c
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+++ b/src/arm/linux/aarch32-isa.c
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@@ -43,6 +43,7 @@ void cpuinfo_arm_linux_decode_isa_from_proc_cpuinfo(
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isa->armv6k = true;
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isa->armv7 = true;
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isa->armv7mp = true;
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+ isa->armv8 = true;
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isa->thumb = true;
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isa->thumb2 = true;
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isa->idiv = true;
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diff --git a/src/arm/mach/init.c b/src/arm/mach/init.c
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index 058cfc2..e912de6 100644
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--- a/src/arm/mach/init.c
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+++ b/src/arm/mach/init.c
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@@ -307,6 +307,7 @@ void cpuinfo_arm_mach_init(void) {
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case CPU_TYPE_ARM:
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switch (cpu_subtype) {
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case CPU_SUBTYPE_ARM_V8:
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+ cpuinfo_isa.armv8 = true;
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cpuinfo_isa.aes = true;
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cpuinfo_isa.sha1 = true;
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cpuinfo_isa.sha2 = true;
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diff --git a/src/arm/midr.h b/src/arm/midr.h
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index 34d7780..2638517 100644
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--- a/src/arm/midr.h
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+++ b/src/arm/midr.h
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@@ -183,6 +183,7 @@ inline static uint32_t midr_score_core(uint32_t midr) {
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case UINT32_C(0x51008000): /* Kryo 260 / 280 Gold */
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case UINT32_C(0x51002050): /* Kryo Gold */
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case UINT32_C(0x4800D400): /* Cortex-A76 (HiSilicon) */
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+ case UINT32_C(0x4100D410): /* Cortex-A78 */
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case UINT32_C(0x4100D0D0): /* Cortex-A77 */
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case UINT32_C(0x4100D0E0): /* Cortex-A76AE */
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case UINT32_C(0x4100D0B0): /* Cortex-A76 */
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diff --git a/src/arm/uarch.c b/src/arm/uarch.c
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index 55b61df..0d7a7d7 100644
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--- a/src/arm/uarch.c
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+++ b/src/arm/uarch.c
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@@ -91,6 +91,9 @@ void cpuinfo_arm_decode_vendor_uarch(
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case 0xD0E: /* Cortex-A76AE */
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*uarch = cpuinfo_uarch_cortex_a76;
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break;
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+ case 0xD41: /* Cortex-A78 */
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+ *uarch = cpuinfo_uarch_cortex_a78;
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+ break;
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#if CPUINFO_ARCH_ARM64 && !defined(__ANDROID__)
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case 0xD4A:
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*uarch = cpuinfo_uarch_neoverse_e1;
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diff --git a/tools/cpu-info.c b/tools/cpu-info.c
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index 2759068..429bbfa 100644
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--- a/tools/cpu-info.c
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+++ b/tools/cpu-info.c
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@@ -183,6 +183,8 @@ static const char* uarch_to_string(enum cpuinfo_uarch uarch) {
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return "Cortex-A76";
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case cpuinfo_uarch_cortex_a77:
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return "Cortex-A77";
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+ case cpuinfo_uarch_cortex_a78:
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+ return "Cortex-A78";
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case cpuinfo_uarch_scorpion:
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return "Scorpion";
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case cpuinfo_uarch_krait:
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diff --git a/tools/isa-info.c b/tools/isa-info.c
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index 98ef919..8365846 100644
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--- a/tools/isa-info.c
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+++ b/tools/isa-info.c
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@@ -121,6 +121,7 @@ int main(int argc, char** argv) {
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printf("\tARMv6-K: %s\n", cpuinfo_has_arm_v6k() ? "yes" : "no");
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printf("\tARMv7: %s\n", cpuinfo_has_arm_v7() ? "yes" : "no");
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printf("\tARMv7 MP: %s\n", cpuinfo_has_arm_v7mp() ? "yes" : "no");
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+ printf("\tARMv8: %s\n", cpuinfo_has_arm_v8() ? "yes" : "no");
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printf("\tIDIV: %s\n", cpuinfo_has_arm_idiv() ? "yes" : "no");
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printf("Floating-Point support:\n");
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9
third_party/cpuinfo/workspace.bzl
vendored
9
third_party/cpuinfo/workspace.bzl
vendored
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@ -5,12 +5,11 @@ load("//third_party:repo.bzl", "tf_http_archive")
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def repo():
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tf_http_archive(
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name = "cpuinfo",
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strip_prefix = "cpuinfo-6cecd15784fcb6c5c0aa7311c6248879ce2cb8b2",
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sha256 = "b1f2ee97e46d8917a66bcb47452fc510d511829556c93b83e06841b9b35261a5",
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strip_prefix = "cpuinfo-5916273f79a21551890fd3d56fc5375a78d1598d",
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sha256 = "2a160c527d3c58085ce260f34f9e2b161adc009b34186a2baf24e74376e89e6d",
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urls = [
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"https://storage.googleapis.com/mirror.tensorflow.org/github.com/pytorch/cpuinfo/archive/6cecd15784fcb6c5c0aa7311c6248879ce2cb8b2.zip",
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"https://github.com/pytorch/cpuinfo/archive/6cecd15784fcb6c5c0aa7311c6248879ce2cb8b2.zip",
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"https://storage.googleapis.com/mirror.tensorflow.org/github.com/pytorch/cpuinfo/archive/5916273f79a21551890fd3d56fc5375a78d1598d.zip",
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"https://github.com/pytorch/cpuinfo/archive/5916273f79a21551890fd3d56fc5375a78d1598d.zip",
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],
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build_file = "//third_party/cpuinfo:BUILD.bazel",
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patch_file = "//third_party/cpuinfo:cpuinfo.patch",
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)
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