mirror of
https://github.com/zebrajr/tensorflow.git
synced 2025-12-06 12:20:11 +01:00
Integrate LLVM at llvm/llvm-project@c39995a116
Updates LLVM usage to match [c39995a116a7](https://github.com/llvm/llvm-project/commit/c39995a116a7) PiperOrigin-RevId: 580134851
This commit is contained in:
parent
7d32124010
commit
1faa5856a0
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@ -2662,7 +2662,7 @@ func.func @test_reverse_fail(%arg0: tensor<1x2x3x4xf32>) -> tensor<1x2x3x4xf32>
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// CHECK-LABEL: test_tfl_custom
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// CHECK-SAME: %[[ARG_0:.*]]: tensor<1x64x64x32xf32>
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// CHECK: %[[VAL_0:.*]] = tosa.custom %[[ARG_0]] {config = "TFL", identifier = "MaxPoolingWithArgmax2D", implementation_attrs = "{{.*}}"} : (tensor<1x64x64x32xf32>) -> (tensor<1x32x32x32xf32>, tensor<1x32x32x32xf32>)
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// CHECK: %[[VAL_0:.*]] = tosa.custom %[[ARG_0]] {domain_name = "TFL", implementation_attrs = "{{.*}}", operator_name = "MaxPoolingWithArgmax2D"} : (tensor<1x64x64x32xf32>) -> (tensor<1x32x32x32xf32>, tensor<1x32x32x32xf32>)
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func.func @test_tfl_custom(%arg0: tensor<1x64x64x32xf32>) -> (tensor<1x32x32x32xf32>, tensor<1x32x32x32xf32>) {
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// custom op for "tfl.max_pooling_with_argmax_2d"(%arg0) {filter_h = 2 : i32, filter_w = 2 : i32, padding = "SAME", stride_h = 2 : i32, stride_w = 2 : i32} : (tensor<1x64x64x32xf32>) -> (tensor<1x32x32x32xf32>, tensor<1x32x32x32xf32>)
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%0, %1 = "tfl.custom"(%arg0) {custom_option = #tfl<const_bytes : "0x01000000020000000200000002000000020000000000000000000000000000000000000000000000">, custom_code = "MaxPoolingWithArgmax2D"} : (tensor<1x64x64x32xf32>) -> (tensor<1x32x32x32xf32>, tensor<1x32x32x32xf32>)
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12
third_party/llvm/generated.patch
vendored
12
third_party/llvm/generated.patch
vendored
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@ -1 +1,13 @@
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Auto generated patch. Do not edit or delete it, even if empty.
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diff -ruN --strip-trailing-cr a/llvm/lib/MC/ELFObjectWriter.cpp b/llvm/lib/MC/ELFObjectWriter.cpp
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--- a/llvm/lib/MC/ELFObjectWriter.cpp
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+++ b/llvm/lib/MC/ELFObjectWriter.cpp
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@@ -843,7 +843,7 @@
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uint32_t ChType, uint64_t Size,
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SmallVectorImpl<uint8_t> &CompressedContents, Align Alignment) {
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uint64_t HdrSize =
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- is64Bit() ? sizeof(ELF::Elf64_Chdr) : sizeof(ELF::Elf32_Chdr);
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+ is64Bit() ? sizeof(ELF::Elf32_Chdr) : sizeof(ELF::Elf64_Chdr);
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if (Size <= HdrSize + CompressedContents.size())
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return false;
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// Platform specific header is followed by compressed data.
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4
third_party/llvm/workspace.bzl
vendored
4
third_party/llvm/workspace.bzl
vendored
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@ -4,8 +4,8 @@ load("//third_party:repo.bzl", "tf_http_archive")
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def repo(name):
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"""Imports LLVM."""
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LLVM_COMMIT = "a682a9cfd006c52559387f80398b720d529595d1"
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LLVM_SHA256 = "27d7ccf7c59a91af5ff8d74ee9d9086d5aa7bf5c0cfffdab6dcad5278923175a"
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LLVM_COMMIT = "c39995a116a74ebafc63648e8f047d13012c4f87"
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LLVM_SHA256 = "cde7016c25257c0789ff5faf226ca3d829eeaa2ab5b22c4388ea35b2b6ee9af4"
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tf_http_archive(
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name = name,
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@ -35,6 +35,7 @@ limitations under the License.
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#include "mlir/IR/BuiltinAttributes.h"
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#include "mlir/IR/OpDefinition.h"
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#include "mlir/Transforms/GreedyPatternRewriteDriver.h"
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#include "mlir/Transforms/LoopInvariantCodeMotionUtils.h"
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#include "thlo/IR/thlo_ops.h"
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namespace mlir {
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@ -401,7 +402,9 @@ struct VectorizeForCPUPass
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}
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// Hoisting transfer_read/transfer_write.
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linalg::hoistRedundantVectorTransfersOnTensor(func);
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IRRewriter rewriter(func->getContext());
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func.walk(
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[&](scf::ForOp forOp) { hoistLoopInvariantSubsets(rewriter, forOp); });
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}
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};
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10
third_party/xla/xla/mlir_hlo/lhlo/IR/lhlo_ops.td
vendored
10
third_party/xla/xla/mlir_hlo/lhlo/IR/lhlo_ops.td
vendored
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@ -1406,8 +1406,9 @@ def FusionOp : LHLO_Op<"fusion", [
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SmallVector<Value> getOutputBuffers() {
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SmallVector<Value> buffers;
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for (auto store : getRegion().front().getOps<memref::TensorStoreOp>()) {
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buffers.push_back(store.getMemref());
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for (auto store : getRegion().front()
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.getOps<bufferization::MaterializeInDestinationOp>()) {
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buffers.push_back(store.getDest());
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}
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return buffers;
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}
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@ -1422,8 +1423,9 @@ def FusionOp : LHLO_Op<"fusion", [
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SmallVector<Value> getFusionResults() {
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SmallVector<Value> buffers;
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for (auto store : getRegion().front().getOps<memref::TensorStoreOp>()) {
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buffers.push_back(store.getTensor());
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for (auto store : getRegion().front()
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.getOps<bufferization::MaterializeInDestinationOp>()) {
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buffers.push_back(store.getSource());
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}
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return buffers;
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}
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@ -398,7 +398,8 @@ func.func @fusion_memref(%input1: memref<10xf32>, %input2: memref<10xf32>, %inpu
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%2 = "mhlo.add"(%0, %1) {name = "add"} : (tensor<10xf32>, tensor<10xf32>) -> tensor<10xf32>
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%3 = bufferization.to_tensor %input3 : memref<10xf32>
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%4 = "mhlo.multiply"(%2, %3) {name = "multiply"} : (tensor<10xf32>, tensor<10xf32>) -> tensor<10xf32>
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memref.tensor_store %4, %out : memref<10xf32>
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bufferization.materialize_in_destination %4 in writable %out
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: (tensor<10xf32>, memref<10xf32>) -> ()
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"lmhlo.terminator"() : () -> ()
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} ) : () -> ()
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func.return
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@ -15,6 +15,7 @@ func.func @parallel_2d(%arg0: memref<4x4xf32>, %arg1: memref<4x4xf32>) {
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scf.yield
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}
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%1 = bufferization.to_tensor %0 : memref<4x4xf32>
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memref.tensor_store %1, %arg1 : memref<4x4xf32>
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bufferization.materialize_in_destination %1 in writable %arg1
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: (tensor<4x4xf32>, memref<4x4xf32>) -> ()
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"lmhlo.terminator"() : () -> ()
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}
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@ -19,7 +19,8 @@ func.func @parallel_loop(%arg0: memref<16xf32>, %arg1: memref<16xf32>) {
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scf.yield
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}
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%1 = bufferization.to_tensor %0 : memref<16xf32>
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memref.tensor_store %1, %arg1 : memref<16xf32>
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bufferization.materialize_in_destination %1 in writable %arg1
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: (tensor<16xf32>, memref<16xf32>) -> ()
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"lmhlo.terminator"() : () -> ()
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}
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@ -101,6 +102,7 @@ func.func @complex_access(%arg0: memref<16xf32>, %arg1: memref<4xf32>) {
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scf.yield
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}
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%1 = bufferization.to_tensor %0 : memref<4xf32>
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memref.tensor_store %1, %arg1 : memref<4xf32>
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bufferization.materialize_in_destination %1 in writable %arg1
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: (tensor<4xf32>, memref<4xf32>) -> ()
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"lmhlo.terminator"() : () -> ()
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}
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@ -4,7 +4,8 @@
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// CHECK-SAME: (%arg0: tensor<8xf32>) -> (tensor<8xf32> {my.attr})
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func.func @unbufferize(%arg0: memref<8xf32>, %arg1: memref<8xf32> {my.attr}) {
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%0 = bufferization.to_tensor %arg0 : memref<8xf32>
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memref.tensor_store %0, %arg1 : memref<8xf32>
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bufferization.materialize_in_destination %0 in writable %arg1
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: (tensor<8xf32>, memref<8xf32>) -> ()
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// CHECK-NEXT: return %arg0 : tensor<8xf32>
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return
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}
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@ -14,7 +15,8 @@ func.func @not_block_arg() {
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%0 = memref.alloc() : memref<8xf32>
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// CHECK: bufferization.to_tensor
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%1 = bufferization.to_tensor %0 : memref<8xf32>
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// CHECK: memref.tensor_store
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memref.tensor_store %1, %0 : memref<8xf32>
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// CHECK: bufferization.materialize_in_destination
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bufferization.materialize_in_destination %1 in writable %0
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: (tensor<8xf32>, memref<8xf32>) -> ()
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return
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}
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@ -152,8 +152,9 @@ def GenericHostToLLVMPass : Pass<"generic-host-to-llvm", "ModuleOp"> {
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def UnbufferizePass : Pass<"unbufferize", "mlir::func::FuncOp"> {
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let summary = "Unbufferize partially bufferized functions.";
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let description = [{
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Removes bufferization.to_tensor and memref.tensor_store ops that are the
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result of XLA bufferizing during HLO to MHLO transformation.
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Removes bufferization.to_tensor and bufferization.materialize_in_destination
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ops that are the result of XLA bufferizing during HLO to MHLO
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transformation.
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}];
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let constructor = "hlo::createUnbufferizePass()";
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}
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@ -69,11 +69,11 @@ void UnbufferizePass::runOnOperation() {
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});
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SmallVector<Value> results;
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SmallVector<DictionaryAttr> resultAttrs;
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funcOp->walk([&](memref::TensorStoreOp op) {
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auto arg = op.getMemref().dyn_cast<BlockArgument>();
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funcOp->walk([&](bufferization::MaterializeInDestinationOp op) {
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auto arg = op.getDest().dyn_cast<BlockArgument>();
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if (!arg) return;
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argsToErase.set(arg.getArgNumber());
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results.push_back(op.getTensor());
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results.push_back(op.getSource());
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resultAttrs.push_back(funcOp.getArgAttrDict(arg.getArgNumber()));
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rewriter.eraseOp(op);
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});
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1
third_party/xla/xla/service/gpu/BUILD
vendored
1
third_party/xla/xla/service/gpu/BUILD
vendored
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@ -350,6 +350,7 @@ cc_library(
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"@llvm-project//llvm:Support",
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"@llvm-project//llvm:ir_headers",
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"@llvm-project//mlir:ArithDialect",
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"@llvm-project//mlir:BufferizationDialect",
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"@llvm-project//mlir:BuiltinToLLVMIRTranslation",
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"@llvm-project//mlir:FuncDialect",
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"@llvm-project//mlir:FuncExtensions",
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@ -40,8 +40,8 @@ bool IsSingleInstructionFusion(mlir::lmhlo::FusionOp fusion) {
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bool seen_instruction = false;
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for (mlir::Operation& instr : fusion.getRegion().front()) {
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if (mlir::isa<mlir::lmhlo::TerminatorOp, mlir::mhlo::ReturnOp,
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mlir::bufferization::ToTensorOp, mlir::memref::TensorStoreOp>(
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&instr)) {
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mlir::bufferization::ToTensorOp,
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mlir::bufferization::MaterializeInDestinationOp>(&instr)) {
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continue;
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}
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if (seen_instruction) return false;
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@ -538,7 +538,7 @@ bool CanEmitFusedDynamicUpdateSliceInPlaceForGpu(
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}
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dus_user = *bitcast->user_begin();
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}
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if (!mlir::isa<mlir::memref::TensorStoreOp>(dus_user)) {
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if (!mlir::isa<mlir::bufferization::MaterializeInDestinationOp>(dus_user)) {
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return false;
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}
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auto operand = dus.getOperand();
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@ -564,8 +564,8 @@ bool CanEmitFusedDynamicUpdateSliceInPlaceForGpu(
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q.push(parameter);
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visited.insert(parameter);
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// We have already checked above that the DUS only has one user: a
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// (possibly bitcasted) TensorStoreOp. So we don't need to visit it during
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// the breadth-first search.
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// (possibly bitcasted) MaterializeInDestinationOp. So we don't need to
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// visit it during the breadth-first search.
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visited.insert(dus);
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while (!q.empty()) {
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auto op = q.front();
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@ -1865,7 +1865,7 @@ Status IrEmitterUnnested::EmitTriangularSolveCustomCall(mlir::Operation* op) {
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// %0 = tensor_load %external_memref0
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// %1 = tensor_load %external_memref1
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// ...
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// tensor_store %ret, %external_memref2
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// materialize_in_destination %ret, %external_memref2
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// }
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// to
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// fusion(%external_memref0, %external_memref1) (^bb(%0, %1) {
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@ -1880,7 +1880,7 @@ static Status ProcessFusionForConversion(mlir::Region* region,
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std::vector<Shape>* operand_shapes,
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std::vector<Shape>* output_shapes) {
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std::vector<mlir::bufferization::ToTensorOp> loads;
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std::vector<mlir::memref::TensorStoreOp> stores;
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std::vector<mlir::bufferization::MaterializeInDestinationOp> stores;
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region->walk([&](mlir::bufferization::ToTensorOp load) {
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if (load.getMemref().getParentRegion() != region) {
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@ -1888,8 +1888,9 @@ static Status ProcessFusionForConversion(mlir::Region* region,
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}
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});
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region->walk([&](mlir::memref::TensorStoreOp store) {
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if (store.getMemref().getParentRegion() != region) {
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region->walk([&](mlir::bufferization::MaterializeInDestinationOp store) {
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if (!isa<mlir::TensorType>(store.getDest().getType())) return;
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if (store.getDest().getParentRegion() != region) {
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stores.push_back(store);
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}
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});
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@ -1904,10 +1905,10 @@ static Status ProcessFusionForConversion(mlir::Region* region,
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std::vector<mlir::Value> returned_values;
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for (auto store : stores) {
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Shape shape = GetShape(store.getMemref());
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Shape shape = GetShape(store.getDest());
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output_shapes->push_back(shape);
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returned_values.push_back(store.getTensor());
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returned_values.push_back(store.getSource());
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store.erase();
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}
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@ -406,7 +406,10 @@ tsl::StatusOr<lmhlo::FusionOp> LhloDialectEmitter::EmitFusionOp(
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llvm::SmallVector<Value, 4> output;
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TF_RETURN_IF_ERROR(GetOrCreateView(instr, &output));
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TF_RETURN_IF_ERROR(WalkTuplePostOrder(result, [&](Value v) mutable {
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region_builder.create<memref::TensorStoreOp>(loc, v, output[i++]);
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auto materialize_op =
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region_builder.create<bufferization::MaterializeInDestinationOp>(
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loc, v, output[i++]);
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materialize_op.setWritable(true);
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return ::tsl::OkStatus();
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}));
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if (i != output.size()) {
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@ -20,7 +20,8 @@ ENTRY TestComputation {
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// CHECK-SAME: result_layout = dense<[0, 1]>
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// CHECK-SAME: xla_shape = "f32[3,2]{0,1}"
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// CHECK-SAME: } : tensor<3x2xf32>
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// CHECK: memref.tensor_store %[[VAL3:.*]], %{{.*}} : memref<3x2xf32, #[[MAP]]>
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// CHECK: bufferization.materialize_in_destination %[[VAL3:.*]] in
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// CHECK-SAME: writable %{{.*}} : (tensor<3x2xf32>, memref<3x2xf32, #[[MAP]]>)
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// CHECK: "lmhlo.terminator"() : () -> ()
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// CHECK: }) : () -> ()
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ROOT fusion = f32[3, 2]{0,1} fusion(f32[3, 2]{1,0} x), kind=kLoop, calls=Fusion
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