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https://github.com/zebrajr/pytorch.git
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Summary: Pull Request resolved: https://github.com/pytorch/pytorch/pull/67624 Test Plan: Visual inspection. Sandcastle. Reviewed By: malfet Differential Revision: D31986628 fbshipit-source-id: c872bded7325997a2945dbf5d4d052628dcb3659
76 lines
2.0 KiB
C++
76 lines
2.0 KiB
C++
#pragma once
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// Apple clang was fixed in 8.1
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#if defined(__apple_build_version__) && \
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((__clang_major__ < 8) || \
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((__clang_major__ == 8) && (__clang_minor__ < 1)))
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#define CAFFE2_INTERNAL_APPLE_NEED_FIX 1
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#endif
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// Regular clang was fixed in 3.9
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#if defined(__clang__) && (__clang_major__ < 4) && (__clang_minor__ < 9)
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#define CAFFE2_INTERNAL_CLANG_NEED_FIX 1
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#endif
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#if defined(CAFFE2_INTERNAL_APPLE_NEED_FIX) || \
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defined(CAFFE2_INTERNAL_CLANG_NEED_FIX)
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#include <c10/util/Half.h>
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#include <emmintrin.h>
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// This version of clang has a bug that _cvtsh_ss is not defined, see
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// https://reviews.llvm.org/D16177
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static __inline float
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__attribute__((__always_inline__, __nodebug__, __target__("f16c")))
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_cvtsh_ss(unsigned short a) {
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__v8hi v = {(short)a, 0, 0, 0, 0, 0, 0, 0};
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__v4sf r = __builtin_ia32_vcvtph2ps(v);
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return r[0];
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}
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static __inline unsigned short
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__attribute__((__always_inline__, __nodebug__, __target__("f16c")))
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_cvtss_sh(float a, int imm8) {
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unsigned short ret;
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*reinterpret_cast<at::Half*>(&ret) = a;
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return ret;
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}
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#endif // __APPLE_NEED_FIX || __CLANG_NEED_FIX
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#undef __APPLE_NEED_FIX
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#undef __CLANG_NEED_FIX
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#if defined(_MSC_VER) && !defined(__clang__)
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#include <c10/util/Half.h>
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#include <cstdint>
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// It seems that microsoft msvc does not have a _cvtsh_ss implementation so
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// we will add a dummy version to it.
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static inline float _cvtsh_ss(unsigned short x) {
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union {
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std::uint32_t intval;
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float floatval;
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} t1;
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std::uint32_t t2, t3;
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t1.intval = x & 0x7fff; // Non-sign bits
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t2 = x & 0x8000; // Sign bit
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t3 = x & 0x7c00; // Exponent
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t1.intval <<= 13; // Align mantissa on MSB
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t2 <<= 16; // Shift sign bit into position
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t1.intval += 0x38000000; // Adjust bias
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t1.intval = (t3 == 0 ? 0 : t1.intval); // Denormals-as-zero
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t1.intval |= t2; // Re-insert sign bit
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return t1.floatval;
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}
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static inline unsigned short _cvtss_sh(float x, int imm8) {
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unsigned short ret;
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*reinterpret_cast<at::Half*>(&ret) = x;
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return ret;
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}
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#endif // _MSC_VER
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