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0bff65503c
# Motivation Move `hardware_destructive_interference_size` to `c10/core/alignment.h`, which gives a chance to reuse it across different accelerators. Pull Request resolved: https://github.com/pytorch/pytorch/pull/160067 Approved by: https://github.com/Skylion007, https://github.com/EikanWang
31 lines
878 B
C++
31 lines
878 B
C++
#pragma once
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#include <cstddef>
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#include <new>
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namespace c10 {
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#ifdef C10_MOBILE
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// Use 16-byte alignment on mobile
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// - ARM NEON AArch32 and AArch64
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// - x86[-64] < AVX
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constexpr size_t gAlignment = 16;
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#else
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// Use 64-byte alignment should be enough for computation up to AVX512.
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constexpr size_t gAlignment = 64;
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#endif
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constexpr size_t gPagesize = 4096;
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// since the default thp pagesize is 2MB, enable thp only
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// for buffers of size 2MB or larger to avoid memory bloating
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constexpr size_t gAlloc_threshold_thp = static_cast<size_t>(2) * 1024 * 1024;
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// Cache line size used to avoid false sharing between threads. Falls back to 64
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// bytes if C++17 feature is unavailable.
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#ifdef __cpp_lib_hardware_interference_size
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using std::hardware_destructive_interference_size;
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#else
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constexpr std::size_t hardware_destructive_interference_size = 64;
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#endif
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} // namespace c10
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