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deps: V8: cherry-pick 2b77ca200c56
Original commit message:
[wasm][liftoff] Always zero-extend 32 bit offsets
The upper 32 bits of the 64 bit offset register are not guaranteed to be
cleared, so a zero-extension is needed. We already do the zero-extension
in the case of explicit bounds checking, but this should also be done if
the trap handler is enabled.
R=clemensb@chromium.org
CC=jkummerow@chromium.org
Bug: v8:11809
Change-Id: I21e2535c701041d11fa06c176fa683d82db0a3f1
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2917612
Commit-Queue: Thibaud Michaud <thibaudm@chromium.org>
Reviewed-by: Clemens Backes <clemensb@chromium.org>
Cr-Commit-Position: refs/heads/master@{#74881}
Refs: 2b77ca200c
PR-URL: https://github.com/nodejs/node/pull/39337
Reviewed-By: Matteo Collina <matteo.collina@gmail.com>
Reviewed-By: James M Snell <jasnell@gmail.com>
This commit is contained in:
parent
c8e7d80475
commit
2393fae427
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@ -36,7 +36,7 @@
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# Reset this number to 0 on major V8 upgrades.
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# Increment by one for each non-official patch applied to deps/v8.
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'v8_embedder_string': '-node.13',
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'v8_embedder_string': '-node.14',
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##### V8 defaults for Node.js #####
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@ -768,7 +768,8 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst_addr,
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void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
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Register offset_reg, uint32_t offset_imm,
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LoadType type, LiftoffRegList pinned,
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uint32_t* protected_load_pc, bool is_load_mem) {
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uint32_t* protected_load_pc, bool is_load_mem,
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bool i64_offset) {
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// Offsets >=2GB are statically OOB on 32-bit systems.
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DCHECK_LE(offset_imm, std::numeric_limits<int32_t>::max());
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liftoff::LoadInternal(this, dst, src_addr, offset_reg,
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@ -126,9 +126,13 @@ inline CPURegister AcquireByType(UseScratchRegisterScope* temps,
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template <typename T>
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inline MemOperand GetMemOp(LiftoffAssembler* assm,
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UseScratchRegisterScope* temps, Register addr,
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Register offset, T offset_imm) {
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Register offset, T offset_imm,
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bool i64_offset = false) {
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if (offset.is_valid()) {
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if (offset_imm == 0) return MemOperand(addr.X(), offset.X());
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if (offset_imm == 0) {
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return i64_offset ? MemOperand(addr.X(), offset.X())
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: MemOperand(addr.X(), offset.W(), UXTW);
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}
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Register tmp = temps->AcquireX();
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DCHECK_GE(kMaxUInt32, offset_imm);
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assm->Add(tmp, offset.X(), offset_imm);
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@ -493,10 +497,11 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst_addr,
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void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
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Register offset_reg, uintptr_t offset_imm,
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LoadType type, LiftoffRegList pinned,
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uint32_t* protected_load_pc, bool is_load_mem) {
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uint32_t* protected_load_pc, bool is_load_mem,
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bool i64_offset) {
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UseScratchRegisterScope temps(this);
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MemOperand src_op =
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liftoff::GetMemOp(this, &temps, src_addr, offset_reg, offset_imm);
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MemOperand src_op = liftoff::GetMemOp(this, &temps, src_addr, offset_reg,
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offset_imm, i64_offset);
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if (protected_load_pc) *protected_load_pc = pc_offset();
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switch (type.value()) {
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case LoadType::kI32Load8U:
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@ -390,7 +390,8 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst_addr,
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void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
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Register offset_reg, uint32_t offset_imm,
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LoadType type, LiftoffRegList pinned,
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uint32_t* protected_load_pc, bool is_load_mem) {
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uint32_t* protected_load_pc, bool is_load_mem,
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bool i64_offset) {
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// Offsets >=2GB are statically OOB on 32-bit systems.
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DCHECK_LE(offset_imm, std::numeric_limits<int32_t>::max());
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DCHECK_EQ(type.value_type() == kWasmI64, dst.is_gp_pair());
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@ -675,7 +675,7 @@ class LiftoffAssembler : public TurboAssembler {
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inline void Load(LiftoffRegister dst, Register src_addr, Register offset_reg,
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uintptr_t offset_imm, LoadType type, LiftoffRegList pinned,
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uint32_t* protected_load_pc = nullptr,
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bool is_load_mem = false);
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bool is_load_mem = false, bool i64_offset = false);
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inline void Store(Register dst_addr, Register offset_reg,
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uintptr_t offset_imm, LiftoffRegister src, StoreType type,
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LiftoffRegList pinned,
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@ -2792,6 +2792,7 @@ class LiftoffCompiler {
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// Only look at the slot, do not pop it yet (will happen in PopToRegister
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// below, if this is not a statically-in-bounds index).
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auto& index_slot = __ cache_state()->stack_state.back();
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bool i64_offset = index_val.type == kWasmI64;
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if (IndexStaticallyInBounds(index_slot, type.size(), &offset)) {
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__ cache_state()->stack_state.pop_back();
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DEBUG_CODE_COMMENT("load from memory (constant offset)");
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@ -2799,7 +2800,8 @@ class LiftoffCompiler {
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Register mem = pinned.set(__ GetUnusedRegister(kGpReg, pinned)).gp();
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LOAD_INSTANCE_FIELD(mem, MemoryStart, kSystemPointerSize, pinned);
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LiftoffRegister value = pinned.set(__ GetUnusedRegister(rc, pinned));
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__ Load(value, mem, no_reg, offset, type, pinned, nullptr, true);
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__ Load(value, mem, no_reg, offset, type, pinned, nullptr, true,
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i64_offset);
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__ PushRegister(kind, value);
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} else {
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LiftoffRegister full_index = __ PopToRegister();
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@ -2818,8 +2820,8 @@ class LiftoffCompiler {
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LiftoffRegister value = pinned.set(__ GetUnusedRegister(rc, pinned));
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uint32_t protected_load_pc = 0;
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__ Load(value, mem, index, offset, type, pinned, &protected_load_pc,
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true);
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__ Load(value, mem, index, offset, type, pinned, &protected_load_pc, true,
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i64_offset);
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if (env_->use_trap_handler) {
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AddOutOfLineTrap(decoder, WasmCode::kThrowWasmTrapMemOutOfBounds,
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protected_load_pc);
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@ -395,7 +395,11 @@ void LiftoffAssembler::AtomicLoad(LiftoffRegister dst, Register src_addr,
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void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
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Register offset_reg, uintptr_t offset_imm,
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LoadType type, LiftoffRegList pinned,
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uint32_t* protected_load_pc, bool is_load_mem) {
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uint32_t* protected_load_pc, bool is_load_mem,
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bool i64_offset) {
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if (offset_reg != no_reg && !i64_offset) {
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AssertZeroExtended(offset_reg);
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}
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Operand src_op = liftoff::GetMemOp(this, src_addr, offset_reg, offset_imm);
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if (protected_load_pc) *protected_load_pc = pc_offset();
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switch (type.value()) {
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58
deps/v8/test/mjsunit/regress/wasm/regress-11809.js
vendored
Normal file
58
deps/v8/test/mjsunit/regress/wasm/regress-11809.js
vendored
Normal file
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@ -0,0 +1,58 @@
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// Copyright 2021 the V8 project authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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//
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// Flags: --enable-testing-opcode-in-wasm --nowasm-tier-up --wasm-tier-mask-for-testing=2
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load("test/mjsunit/wasm/wasm-module-builder.js");
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var instance = (function () {
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var builder = new WasmModuleBuilder();
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builder.addMemory(1, 1, false /* exported */);
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var sig_index = builder.addType(makeSig(
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[kWasmI32, kWasmI32, kWasmI32, kWasmI32, kWasmI32, kWasmI32, kWasmI32,
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kWasmI32],
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[kWasmI32]));
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var sig_three = builder.addType(makeSig(
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[kWasmI64, kWasmI64, kWasmI64, kWasmI64, kWasmI64, kWasmI64, kWasmI64,
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kWasmI64],
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[]));
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var zero = builder.addFunction("zero", kSig_i_i);
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var one = builder.addFunction("one", sig_index);
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var two = builder.addFunction("two", kSig_v_i);
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var three = builder.addFunction("three", sig_three).addBody([]);
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zero.addBody([kExprLocalGet, 0, kExprI32LoadMem, 0, 0]);
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one.addBody([
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kExprLocalGet, 7,
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kExprCallFunction, zero.index]);
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two.addBody([
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kExprI64Const, 0x81, 0x80, 0x80, 0x80, 0x10,
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kExprI64Const, 0x81, 0x80, 0x80, 0x80, 0x10,
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kExprI64Const, 0x81, 0x80, 0x80, 0x80, 0x10,
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kExprI64Const, 0x81, 0x80, 0x80, 0x80, 0x10,
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kExprI64Const, 0x81, 0x80, 0x80, 0x80, 0x10,
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kExprI64Const, 0x81, 0x80, 0x80, 0x80, 0x10,
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kExprI64Const, 0x81, 0x80, 0x80, 0x80, 0x10,
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kExprI64Const, 0x81, 0x80, 0x80, 0x80, 0x10,
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kExprCallFunction, three.index,
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kExprI32Const, 0,
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kExprI32Const, 0,
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kExprI32Const, 0,
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kExprI32Const, 0,
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kExprI32Const, 0,
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kExprI32Const, 0,
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kExprI32Const, 0,
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kExprI32Const, 0,
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kExprCallFunction, one.index,
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kExprDrop,
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]).exportFunc();
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return builder.instantiate({});
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})();
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instance.exports.two()
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