mirror of
https://github.com/zebrajr/ladybird.git
synced 2025-12-06 00:19:53 +01:00
LibWasm: Use 0x40 flag for SIMD memory memidx like scalar ops
SIMD loads/stores checked bit 0x20 of the align immediate to detect a
following memory index, unlike scalar mem ops which use 0x40 per the
multi-memory encoding. This caused the memidx byte to be misparsed as
the next immediate (e.g. offset).
Update both SIMD sites (v128 load/store and lane variants) to check and
clear 0x40, then read LEB128<u32> memidx.
Repro:
(module (memory $m0 1) (memory $m1 1)
(func (export "go")
i32.const 0
v128.load (memory 1)
drop))
Before: printed memidx 0 with offset 1.
After: prints memidx 1 with offset 0.
This commit is contained in:
parent
cdab6b0a2f
commit
c53d9d7122
|
|
@ -588,8 +588,8 @@ ParseResult<Instruction> Instruction::parse(ConstrainedStream& stream)
|
|||
|
||||
// Proposal "multi-memory", if bit 6 of alignment is set, then a memory index follows the alignment.
|
||||
auto memory_index = 0;
|
||||
if ((align & 0x20) != 0) {
|
||||
align &= ~0x20;
|
||||
if ((align & 0x40) != 0) {
|
||||
align &= ~0x40;
|
||||
memory_index = TRY_READ(stream, LEB128<u32>, ParseError::InvalidInput);
|
||||
}
|
||||
|
||||
|
|
@ -610,8 +610,8 @@ ParseResult<Instruction> Instruction::parse(ConstrainedStream& stream)
|
|||
|
||||
// Proposal "multi-memory", if bit 6 of alignment is set, then a memory index follows the alignment.
|
||||
auto memory_index = 0;
|
||||
if ((align & 0x20) != 0) {
|
||||
align &= ~0x20;
|
||||
if ((align & 0x40) != 0) {
|
||||
align &= ~0x40;
|
||||
memory_index = TRY_READ(stream, LEB128<u32>, ParseError::InvalidInput);
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user